Study on the Design Methodology and Test Scheme of VHDL Compiler MTC

A HDL compiler MTC is designed by introducing the object-oriented technology into the design process.The VHDL syntax phenomena are abstracted and classified in the C++ class form,and the design strategy of lexical analyzer and grammar analyzer is presented.The method to resolve the two kinds of conflict existing in LALR(1) analysis is discussed in this paper.Semantic analysis is performed by adopting syntax-directed translation.A formalization method is adopted to represent the intermediate data structure.The automation tool Flex++ and(Bison++) are used together to generate the final object-oriented VHDL compiler.The test scheme of MTC is also presented.Compared with the existing system,the efficiency of MTC is improved 57% in the compiling process of SPARC chip MB86901 algorithmic description.