Development of Pseudorandom Sequence Agile Frequency Hopping Frequency Synthesizer

An approach of a low spurious, low phase noise, agile frequency synthesizer was presented. The synthesizer adopted DDS chip (AD9852) as the excitation for the PLL chip (Q3236) and TMS320C31 of TI as its control unit. By combining the lutra high frequency resolution of DDS and the high operation frequency of PLL, better performance can be achieved. The phase noise of the synthesizer output is less than -100 dB/Hz(away from carrier 1 kHz) and the spurious level is less than -60 dB.