Optimization of Architecture of SOVA Decoder

This article focuses on the optimization of architecture for the soft output viterbi algorithm (SOVA) decoder of Turbo code. Principle of the SOVA decoder is first introduced, and two features regarding the hardware implementation in its optimization are analyzed. The one is based on the bit level hardware and the other based on the algebra ring method, which transforms the non linear operations on real ring to linear operations on a defined ring. In this way the decoder architecture is streamlined and the running speed accelerated.